V53C104HP45 Vitelic

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V53C104HP45 Vitelic

V53C104HP45

Quantité
7
Fabricant
Vitelic
Date de fabrication
9324
Description
on stock, DRAM FAST PAGE, 256KX4,CMOS,DIL20 pulls
V53C104HP45 Vitelic

V53C104HP45

Quantité
7
Fabricant
Vitelic
Date de fabrication
9324
Description
in stock, DIL20 package, DRAM FAST PAGE, 256KX4,CMOS

Technical Specification V53C104HP45

Mfr Package Description 0.300 INCH, PLASTIC, DIP-20
Status Discontinued
ertzertzertz 45.0 ns
JESD-30 Code R-PDIP-T20
JESD-609 Code e0
Memory Density 1048576.0 bit
Memory IC Type FAST PAGE DRAM
Memory Width 4
Number of Functions 1
Number of Ports 1
Number of Terminals 20
Number of Words 262144.0 words
Number of Words Code 256K
Operating Mode ASYNCHRONOUS
Operating Temperature-Min 0.0 Cel
Operating Temperature-Max 70.0 Cel
Organization 256KX4
Output Characteristics 3-STATE
Package Body Material PLASTIC/EPOXY
Package Code DIP
Package Shape RECTANGULAR
Package Style IN-LINE
Peak Reflow Temperature (Cel) NOT SPECIFIED
Qualification Status Not Qualified
Refresh Cycles 512.0
Seated Height-Max 4.572 mm
Supply Voltage-Nom (Vsup) 5.0 V
Supply Voltage-Min (Vsup) 4.5 V
Supply Voltage-Max (Vsup) 5.5 V
Surface Mount NO
Technology CMOS
Temperature Grade COMMERCIAL
Terminal Finish Tin/Lead (Sn/Pb)
Terminal Form THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL
Width 7.62 mm
Schicken ist Föhn RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH

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